In order to be able to replace several different protocols, LIDD mode provides a basic interface and a series of registers to configure the output. The basic block diagram is shown on the screen. 4 main registers are exposed to the CPU for read and write. LIDD mode supports different configurations. Exactly which signals are provided depends on the configuration being used. Some are synchronous while others are asynchronous. As in Raster mode, the output signals have variable timing parameters which can change the output signal polarity, setup, hold, duration of read and write strobes, and the delay between write commands.

