Instellingen
Snelle levering
Gratis verzending
Incoterms
Betalingswijzen
Marketplace-product
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Product List
As shown on the screen, the LCD controller module is integrated into TM4C129x devices, and it has been designed to ease the load on the CPU. The implementation requires the CPU to only write into the SRAM buffer when the image to be displayed changes. The LCD DMA engine will continuously read the image data until the CPU requests it to stop. Since the LCD controller has its own dedicated, high priority DMA engine, it doesn’t have to steal cycles from the micro DMA module in the system. The LCD DMA engine has a small FIFO and it allows periodic interruptions as necessary.
PTM Published on: 2014-02-18
Nederland